1. Field of the Invention
The present invention relates to a defect inspection system for detecting a foreign material and a defect produced in a process for manufacturing a large scale integration (LSI) semiconductor device or a flat display substrate.
2. Description of the Related Art
In the process for manufacturing a semiconductor LSI, for example, a foreign material or a defect pattern present on a substrate (wafer) may cause a malfunction such as a short circuit and insulation. With the tendency of reducing the size of a semiconductor element, a micro foreign material and a defect pattern cannot be ignored as the cause of the malfunction. Therefore, the importance of the following technique is increased: a technique for inspecting a foreign material and a defect during the process for manufacturing a semiconductor wafer and for managing the yield in order to take measures for reducing defects.
Defect inspection techniques are mainly divided into two methods, a bright field imaging method and a dark field imaging method. The bright field imaging method is to illuminate a sample and detect light (zero-order diffracted light) specularly reflected from the sample, while the dark field imaging method is to detect scattered light, without detecting the light (zero-order diffracted light) specularly reflected from the sample.
Each of JP-A-2005-283190 and Japanese Patent No. 3566589 discloses a technique using the dark field imaging method. JP-A-2005-283190 describes a technique for using a plurality of illumination sections and switching between light paths of the illumination sections based on the type of a foreign material or a defect. Japanese Patent No. 3566589 describes a technique for illuminating a sample substrate having a circuit pattern formed thereon with beams substantially parallel to each other in a longitudinal direction of an elongated beam spot formed by the beams, the beams propagating in a direction corresponding to a predetermined angle with respect to a normal to the substrate, a predetermined angle with respect to main straight lines of the circuit pattern and a substantial right angle with respect to the direction of scanning the sample substrate mounted on a stage.